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Automotive Versions of Flash-based, Non-volatile FPGA Family

Lattice recently introduced AEC-Q100 qualified versions of its LatticeXP2 Instant-On FPGA family.  These are devices built using a process that includes SRAM Programmable Logic + FLASH Storage on a single-die.  Lattice has raised the capabilities of automotive FPGAs by offering new system-on-chip (SoC) features such as full-feature DSP blocks, pre-engineered source I/O blocks and its exclusive FlexiFLASH™ architecture.

The FlexiFLASH architecture integrates the configuration Flash on the same silicon die as the SRAM FPGA logic.  The non-volatile FlexiFLASH architecture enables Instant-On startup speed, FlashBAK capabilities as well as the additional benefits of fault tolerance and redundancy.  FlashBAK enables the contents of the Embedded Block RAM to be written back to the FLASH memory so that during subsequent device initializations, the EBR memory is loaded with the new values.

Automotive system designs are using a growing number of FPGA devices to add additional capabilities and flexibility.  The LA-XP2 provides designers the broadest offering for performance and features of any AEC-Q100 qualified FPGA.  The instant-on capability allows the LA-XP2 FPGA to be used for applications that cannot wait for a typical FPGAs to startup such as Engine Control Units, FlexRay and CAN interfaces, processor bus decoders, Power-on-Reset and low power designs using duty cycling.

Instant-On, Redundancy and FlashBAK, these are a few of the advanced features offered in the LA-XP2 that are enabling advanced automotive systems.

Fighting Microprocessor Obsolescence with FPGAs

This webcast will be a look at microprocessor obsolescence and how it affects customer’s products and how FPGAs provide the best replacement solution. The presentation will include several designs where customers have worked with Lattice Semiconductor to cost effectively recover from an End Of Life as well as protect themselves against future Microprocessor Obsolescence.

Join me Wednesday, June 25th, 2008 11:00 AM (GMT -07:00) PDT for the webcast and ask me questions at the conclusion. To join, click here or cut and paste the following link: http://latticesemi.webapp.intevista.com/event/1jzf4qhxn1

Advance Features Enable Lowest-Power CPLD

Lattice just introduced the ispMACH 4000ZE family of CPLD devices in densities ranging from 32 to 256 macrocells.  These offer the lowest standby power of any of the zero-power CPLDs.  One of the main features for reducing the power consumption is Power Guard, which provide an easy way to lower the operating power of the CPLD by disconnecting the logic array from external input signal changes.  Any logic that changes state consumes power, removing the external stimulus activity from the logic array when it is not needed suspends internal logic activity that results in a power savings. 

There are 2 to 16 Power Guard blocks within the CPLDs depending on the density of the device.  The Power Guard control consists of logic between the I/O pin and the input buffer.  The gating logic known as the Block Input Enable (BIE) signal is controlled by an output from one of the internal macrocells in the logic array.  The Power Guard feature is enabled or disabled on a pin-by-pin basis.

Features such as Power Guard contained in this new family of zero-power CPLDs are enabling additional integration within portable and battery powered applications that require ultra low power consumption.

Microcontroller Obsolescence Solution

There are very few customers that enjoy receiving the statement: “Dear customer, the microcontroller in which you invested years of development time and money and planned to have in production for another 10 years is going End-Of-Life!” There have been several popular microcontrollers and microprocessors that have gone EOL over the last few years as semiconductor suppliers consolidate and prune their product portfolios.

Customers have the choice of performing a last-time purchase or re-designing the product. Last time purchases are problematic in the areas of up-front cash outlays and forecast quantities. As far as redesign, a simple board layout change to support a different part is easy, but software compatibility is the major hurdle when moving to a different microcontroller family. Most companies have a large investment in their target software; changing to a new architecture typically requires a complex and costly software port as well as verification.

Lattice to the Rescue
Lattice recently helped a customer in just this situation. The customer had a microcontroller in continuous production for more than 15 years. Not wanting to tie up capital in a last-time buy, the customer looked for other alternatives.

The customer required the replacement to be exactly the same fit and function as the original microcontroller. In addition, external and internal timing, processor functionality and even the same binary program had to run with no modifications. This compatibility included embedded software timing loops in the legacy processor code.

The final hardware solution is a small mezzanine board that contains an instant-on LatticeXP2 FPGA, an ADC device and clock generator. A PLCC connection allows direct interfacing with the manufacturer’s PCB and provides a pin-for-pin replacement for the original microcontroller. As the LatticeXP2 contains on-chip FLASH memory to configure the logic on startup, there is no need for an external boot memory which reduced the board device count and allowed for a smaller final solution.

The software solution used a third-party Intellectual Property (IP) core from Digital Core Design. DCD is a Lattice IP partner that offers a number of microcontroller and peripheral IP solutions. DCD modified an existing microcontroller core to match the exact execution and peripheral set found on the obsolete device.

The pin compatible solution allowed the customer design team to focus their efforts on validating the IP core instead of performing a full hardware and software design and validation. The solution enabled by Lattice and DCD ultimately saved the customer time and money by not having to perform a total system re-design.

Conclusion
Microcontroller and Microprocessor obsolescence will continue, but fortunately there are easy solutions to the problem using FPGAs coupled with microcontroller IP. The Instant-On LatticeXP2 FPGA provides a secure and small footprint solution that also meet customer’s very long life requirements. Microcontroller IP from partners like DCD allows a very quick and cost effective solution to replace existing microcontrollers while retaining exact software compatible with the original design.

Low-Cost Automotive Power Management Solutions

Designing power management control systems in automotive applications has become quite complex due to the continuous changes in technology. While 5-volt devices are preferred by automotive engineers for the robustness of the I/Os, every new generation of devices require a new, smaller operating voltage. On-board management of all the multiple voltage supplies becomes quite a challenge.

Devices that require their supply voltages to be applied in a very specific sequence to insure correct operation further complicate this challenge. All too often a “traditional” power management solution is applied to these “turbo-charged” power management requirements, resulting in circuit board designs that are inefficient, costly and usually compromised by tradeoffs.

Looking for powerful, cost effective solutions, several automotive customers requested Lattice provide the popular power manager devices in an automotive temperature range. Lattice responded, and in February 2008 announced the release of the automotive temperature LA-ispPAC-POWER1014/A power manager devices. The Lattice POWR-1014/A are the only fully-programmable power managers offered in automotive temperature.

The POWER1014/A incorporates both in-system programmable logic and in-system programmable analog circuits to perform the special functions that are optimized for power supply control, sequencing and monitoring. The POWR-1014A has 10 analog inputs for voltage monitoring, and can control up to 14 outputs. A built-in reset generator is available for control of external microprocessors.

By using a programmable, mixed signal power management device. Automotive designers can standardize on this “power management PLD,” using the device across all the automobile's ECUs, resulting in reduced cost as well as increased reliability.

FPGA Video Interfacing Fundamentals - Revisited

I first presented information on FPGA Video Interfacing Fundamentals in February of 2006. I am excited by the opportunity to revisit this topic and add additional details and design examples.  These excerpts from the webcast provides the best overview of the topics I will discuss:

"The use of image and video processing in electronic equipment continues to grow. This page lists several of the common market trends that are driving video growth. New applications, increasing customer expectations as well as declining display prices help to fuel this growth. New standards require support such as SMPTE, MediaLB and Display Port; which need easily implemented and cost effective solutions.

The implementation of low cost imagers and cameras has exploded in the areas of automotive and surveillance systems. Lastly, many systems are moving from a single display to supporting multiple displays.

I will go over the 3 main components of a typical system: video imagers, LCD panels, and video controller systems."

Join me Wednesday, March 26, 2008 11:00 AM (GMT -07:00) PDT for the webcast and ask me questions at the conclusion. To join, click here or cut and paste the following link:

http://www.latticesemi.com/corporate/webcasts/fpgavideointerfacingfunda.cfm

LatticeXP2 FPGA flexiFLASH and FlashBAK

The flexiFLASH architecture found in the LatticeXP2 FPGA relates to the on-die FLASH memory and contains the following features; Instant-on configuration, small footprint, single chip, FlashBAK technology and serial TAG memory.

One of the main features of this architecture is called FlashBAK.  FlashBAK allows EBR (Embedded Block RAM) data to be written and stored in the configuration Flash memory.  Flash to EBR transfer occurs as part of the device startup or by user command, and an EBR to FLASH transfer will occur upon user command.  The ability to store information such as CPU instructions, error codes, coefficients, system calibrations, graphical system configuration and startup data provides the benefit of having the information instantly available the next time the system starts.  Additionally, keeping the EBR data on-die also secures the designs operating data.

The FlashBAK feature allows system designs with greater flexibility, smaller foot print and better security then other FPGA solutions.

Disposable Cars?

Recently another FPGA supplier announced their first family of AEC-Q100 automotive qualified devices.  They received quite a bit of press due to their testing to automotive Grade-1 that equates to a temperature range of -40C to +135C Junction.  According to the datasheet these devices have a Maximum Tj of +150C.  This sounds very attractive to automotive customers looking to use FPGA devices in under the hood applications.

I thought, “Wow, this is impressive”.  My initial excitement was soon dashed when I looked through the datasheet and found their HTR (High Temperature Data Retention) results.  This is the amount of time the internal Flash memory is not expected to have a failure due to flash cell leakage.   Operating these devices at +70C provides an HTR value of +100 years, however at +125C the HTR value drops to 6.2 years and at under the hood temperature of +135C the value is 4.4 years (+150C = 2.2 years).

For some consumers an engine or brake system failure after 4.4 years of service may not be an issue, but for others it can be a life-threatening situation.

The Lattice FPGA temperature ratings are (Grade 2, -40C to +125C Tj) and the HTR results for Lattice Flash based devices is greater than 100 years at full temperature.  This means almost no chance of an automotive system malfunction due to Flash memory retention issues.  I know that I want any vehicle my family travels in to continue to operate even in high temperature conditions.  Lattice FPGA devices provide me that peace of mind.

Lattice Automotive (LA-) Devices Complete Media Interface

Recently I was sent a design that shows the value of Lattice AEC-Q100 automotive qualified CPLDs.  This design was provided to Lattice by the system designer and is shown here with their permission.

The design is for an Automotive Network Gateway.  The system is a protocol converter that handles communication between the various automobile buses: MOST, FlexRay, Ethernet, CAN and LIN.  The bulk of the processing is performed in the Freescale PowerPC processor that has on-board network Media Access Controllers that directly interface with many of the external physical transceivers.  The one device that does not directly connect is the SMSC MOST to MediaLB transceiver.  The MediaLB interface is 3 or 5-wire interface that is a multi-drop bus which is similar in operation to I2C and I2S.

For this application, the designer found that some signal translation and manipulation was required between the SMSC device and the microprocessors.  After reviewing the available options, these functions were implemented in the Lattice Mach4064V.

This functionality could have been performed in discrete logic, but in addition to the MediaLB interface, the designer was able to incorporate other system functionality and glue logic required in the design into this one CPLD device.  The Mach4064V provides a fast, small footprint solution that is very inexpensive.  As Lattice is the only TS16949 certified CPLD supplier that offers a –40C to +125C ambient device that is fully AEC-Q100 qualified, this customer was able to easily meet their customer’s temperature requirements.

While Lattice offers automotive qualified crossover CPLDs in the LA-MachXO family and has high performance FPGA’s on the roadmap, we can’t forget the small CPLDs that can easily solve many of the logic problems that automotive designers encounter every day.

Automotive Multimedia Meets Consumer Products

Travel just about anywhere today and you see someone wearing headphones plugged into a ubiquitous portable consumer multimedia device. These small units have the ability to store large amounts of audio and video content; more recent devices include streaming multimedia combined into a cell phone. The one place you ‘hopefully’ won’t see these units in use is by the operator of a vehicle on public roads and highways or in conjunction with any form of transportation.

The inability to play multimedia files from portable media in automobiles is a frustration for drivers. There are some workarounds that allow them to be used: FM Transmitters, Cassette tape adapters, but these generally produce less than desirable results. Some factory radios now have auxiliary audio inputs for interfacing with a media player or the option for direct iPod connection. While the iPod connection usually allows control of the iPod from the auto multimedia system, it does exclude the other 50% of the non-Apple portable player market.

Automotive manufacturers are working on new systems to allow additional connections to portable consumer devices. Implementation of these connections is through one of more of the following: Bluetooth, SD/SDIO, WiMAX, USB and proprietary connections. Recently the MOST consortium announced that their automotive media bus is now available for incorporation into consumer devices. This may open the way for additional connection methodologies.

Automotive manufacturers are also building multimedia platforms with hard disk and DVD drives. These have been incorporated to allow additional functionality in the areas of Navigation mapping, audio and video content. Combined with a wireless interface, it is also possible to use a wireless network system to download multimedia content to the local hard drive for playback. As most new HDD and DVD drives are using Serial ATA, the automotive manufacturers must now incorporate S-ATA interfaces into their systems.

Lattice is working with automotive manufacturers to provide complete hardware and software solutions for vehicle electronics. From the automotive versions of the LA-MACH4000 CPLD families to the LatticeECP2M FPGA that has on-chip SERDES and can support S-ATA and PCI Express. Lattice is helping automotive customers meet their overall functionality goals - at a lower system cost coupled with a faster time to market.